タイトル:  Sr Hardware Engineer

Responsibility:

1. Carry out Logic design and verification for SOC Chip.
2. Make circuit spec based on requirements, and code RTL, and make design report.
3. Make verify items, and build up simulation env., and carry out simulations and debug.
4. Make SDC for IP/Macro and do synthesis, and do check for netlist.
5. Make relative technical documents in English.

Qualification:
1. Bachelor degree or above in EE/CS or related field
2. 3+ years of experiences on design and verification.
3. Proficient in Verilog / SystemVerilog
4. Proficient in logic design and verification
5. Familiar with Synthesis and static verify for RTL/netlist
6. Familiar with UVM simulation is preferred
7. Familiar with related EDA tools
8. Highly organized and self-motivated, and working well with teammates