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Title:  Mask Design 5

Department: 
Location: 

Shanghai, CN

Job Function:  Hardware Engineering

 As part of the Renesas Culture and our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial, Renesas believes in, and is committed t,o our employees’ growth. We are committed to diversity and inclusion and providing opportunity for all. Grow your career, find new opportunities, and advance yourself at Renesas.

For questions on this opportunity, please contact the recruiter for the role: Jiang Hui Ting 

  • Job Requirements:

  • Work with circuit designers to build physical design floor-plan.
  • Complete the physical layout design with the constraints of circuit design requirements.
  • Verify the physical layout design to meet both circuit design requirements and process requirements.
  • Use the advanced technologies to improve layout design quality and efficiency.
  •  

    Qualifications:

  • Experience with analog IC layout. Strong background in optimizing layout that meet tight matching/capacitive requirements.
  • Understand process layers, process flow and device isolation.
  • Experience with TSMC 16nm or more advanced process pdk and rule decks.
  • Skillful with Cadence Virtuoso Layout XL tools, and Mentor Calibre DRC/LVS/Extraction tools.
  • Experience of using version control tool in the work.
  • Ability to work closely with circuit design engineers and provide feedback on layout optimization.
  • Understanding of electrical parameters, semiconductor devices, ESD and latch up is highly preferred.
  • College degree (or above) in Electrical Engineering or other related engineering field.
  • At least 5 years layout design experience.
  • Patient, A good team player; Good communication skills.
  • Can communicate with both written and spoken English.