Loading...
 
Share this Job

Title:  Front End Digital Design Engineer

Department: 
Location: 

Milpitas, CA, US, 95035

Job Function:  Hardware Engineering

Job Type:  Permanent - Full Time 

Travel Required:  Up to 25% 

Remote Work Available:  Yes 

 

Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portfolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.

 

Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.

Job Description

This is an opportunity to join a top-notch battery Management Systems Team with Renesas’ leading Automotive Business Unit. You will be part of a very skilled group of engineers who are helping build world class automotive battery management products that will power tomorrow’s HEV / BEV automotive. You will design complex chips that includes various analog and digital control circuitry and work very closely with all aspects of chip design – from writing specifications to developing tests for mass production. You will be a key contributor to the digital design team and work closely with analog design team for design integration, as well as applications and test engineering team for validating and testing your on-chip solutions. You will have an opportunity to work on new designs, develop new standards and shape the company’s pathway for success. Your responsibilities, depending on your level of experience and skill level, will be a mix of the following:

  • Designing digital RTL that meet timing, area, power and any adhering standards specifications
  • Integrating design at the top level and Running block & top-level simulations
  • FPGA prototyping of digital circuits for algorithmic validation and proof of concept
  • Participate in all aspects of Mixed-signal design flow - Micro-architecture, Design partitioning, RTL Verilog / SystemVerilog Design, FPGA prototyping, Generating Timing Constraints, Synthesis, Interaction with P&R Team, Timing Analysis, LINT, CDC
  • Working closely with P&R team and supervise their work to generate a layout that meets timing, area and power requirements.
  • Assist with top level test-bench creation and Running gate level simulations
  • Working with analog and digital verification engineers to come up with complex test scenarios for pre-silicon verification
  • Helping develop AMS, SystemVerilog or Verilog-real behavioral model for your circuit
  • Developing detailed design document and help write chip level documents and collateral
  • Holding and participating in key design reviews and completion of various checklists

 

Working on-site is optional but taking pride in your work and having passion is a must!

 

 

 

Qualifications

Several openings are available for Entry-level design as well as for seasoned and experienced designers. Following are rough guidelines for the qualifications (if you feel you have much more or somewhat less, let that not stop you from applying):

 

Entry Level

  • Required
    • Verilog or VHDL RTL Design
    • Synopsys, Cadence or Mentor Simulation platform
    • Understanding of Digital Design concepts & methodology
    • MS Office
  • Desirable
    • C, Java, PERL, Python, sh/bash/csh scripting, and others
    • FPGA Design experience
    • Verilog-A, Verilog-AMS, System Verilog

Experienced Professionals:

 

  • Required
    • 5-15+ Years’ experience in digital design
    • Must be a team player and yet be an independent thinker with strong design fundamentals
    • Must have experience of conceptualizing and creating robust and understandable designs
    • Ideal candidate will have solid understanding of synthesizable design, timing constraints and how their design implementation looks like on silicon.
    • Must have experience with industry standard Synopsys, Cadence, Mentor and other tools used in flows
    • Attention to detail, accuracy and good communication skills
    • Must have good written and verbal cross-functional communication skills
    • Have an analytical mind - be open to persuasion and have capability to persuade others

 

  • Desirable
    • Experience of contributing towards several silicon tapeout cycles from spec to mass production
    • Knowledge of Verilog, Verilog-ams or other modeling / coding languages
    • Experience with FPGA prototyping, synthesis, debugging and validating algorithms
    • Working knowledge of revision control tools such as SOS or SVN
    • Domain Specific knowledge: A good understanding of one or more than one of the following will be a plus but is not required:
    • I2C, SPI, AMBA
    • PMIC (Power Management ICs) & Regulators
    • Video signal processing
    • Various SerDes protocols

 

Education

 

• BSEE required (MSEE preferred) 

 

Equal Opportunity Employer: Disability/Veteran

 

 

Renesas Electronics America is an equal opportunity and affirmative action employer, committed to celebrating diversity and fostering a work environment free of discrimination on the basis of sex, race, religion, national origin, gender, gender identity, gender expression, age, sexual orientation, military status, veteran status, or any other basis protected by federal, state or local law.


Nearest Major Market: San Jose
Nearest Secondary Market: Palo Alto