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Title:  Principal Digital Design Engineer

Company:  Renesas Electronics America Inc.
Country/Region:  US
State:  Georgia
City:  John's Creek
Department: 
Business Unit:  IoT and Infrastructure Business Unit
Office:  REA(John's Creek)
Job Function:  Hardware (Digital)
Job Type:  Permanent
Description: 

Renesas Electronics Americas (REA) is a dynamic, multi-cultural tech company where employees can learn, mentor and thrive. REA brings together the strong financial foundation of a multi-billion-dollar global operation and the flexibility and velocity of a smaller organization. We are developing technologies for the latest advances in mobile computing, secured connected devices, autonomous driving, smart homes and factories and more. Our solutions are at the heart of products developed by the major innovators around the world. Join us and be part of what’s next in electronics.


Renesas is looking for a talented individual for their memory interface products. We are looking for a candidate with a strong background in several areas of IC development.  These areas are architecture, RTL digital design, and design back-end.  Candidate will work with device specifications and develop digital sections of the device. This candidate needs strong debugging skills to design and create solutions to challenging memory interface issues.  Candidate will work closely with applications and test engineering.   In addition, strong collaboration and communication skills are a must.

 

Desired Skills and Experience and Requirements: 

  • BSEE or MSEE in Electrical Engineering with a minimum of 5+ years of industrial experience in CMOS RTL digital design.  Position level will be commensurate to experience
  • Expertise in Verilog RTL digital design that optimizes for speed, power, and area
  • Experience in designing state machines, math modules, and control logic
  • Expertise in using digital design and verification tools and methodologies.  (Such as VCS/NCV, and UVM)
  • Good understanding of integrated circuits (ICs) including device level physics, particularly transistor level circuit design, analog layout, and design tools
  • Good understanding of schematic capture, layout, LVS (layout versus schematics) & DRC (design rule check) verification
  • Experience using static timing tools, design for test tools, and interfacing with place and route team
  • Great attitude, self-motivation, communication skills and excellent team work is a must

 

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