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Title:  Sr Engineer

Requisition ID:  52015

Indiranagar, IN

Job Function:  Engineering

Job Type: Permanent  - Full Time 

Travel Required: 0% 

Remote Work Available: Yes 


Renesas is one of the top global semiconductor companies in the world. We strive to develop a safer, healthier, greener, and smarter world, and our goal is to make every endpoint intelligent by offering product solutions in the automotive, industrial, infrastructure and IoT markets. Our robust product portolio includes world-leading MCUs, SoCs, analog and power products, plus Winning Combination solutions that curate these complementary products. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.


Renesas employs roughly 21,000 people in more than 30 countries worldwide. As a global team, our employees actively embody the Renesas Culture, our guiding principles based on five key elements: Transparent, Agile, Global, Innovative, and Entrepreneurial. Renesas believes in, and has a commitment to, diversity and inclusion, with initiatives and a leadership team dedicated to its resources and values. At Renesas, we want to build a sustainable future where technology helps make our lives easier. Join us and build your future by being part of what’s next in electronics and the world.



Job Title: Sr Manager


Job Location: Bangalore


Job Summary:


Job Purpose: Layout, and fully verify, mixed signal cells according to wafer fab design rules, delivering high quality, manufacturable layouts in the agreed timescales. Interface to 3rd party contractors to establish quality and schedule criteria.


Principal Accountabilities:


  • All Layout activities including top, cell and block level creation, edit and full verification
  • Use state-of-the-art layout techniques for matching, ESD, latch-up prevention and parasitic reduction
  • Work with an estimation of layout timescales plus any subsequent re-estimations due to design changes
  • Continuous assessment and reporting of timescale risks
  • Suggest improvements to the overall layout capabilities of Dialog Semiconductor team
  • Demonstrate an awareness and understanding of Semiconductor processes from physical point of view
  • Participation at all relevant project meetings
  • Maintain a layout workspace that is consistent with current working practice (directory structures, etc.)


Key Performance Measures:


  • Deliver device layouts in the agreed time scales as set by program schedule for all assigned tasks
  • Takes responsibility for solutions and makes them happen
  • Results-oriented and able to deliver on-time under tight schedule pressures
  • Looks for continuous improvement in own and Dialog work practices
  • Confident and enthusiastic attitude regarding own role and contribution to company goals


Knowledge, Skills and Experience:


  • Typically, 6 to 10 years’ experience of block level through to top-level layout,
    •  including floor planning, power routing and full verification prior to tape-out
  • Thorough understanding of the impact of their layout in terms of yield and financial implication.
  • Should be able to understand Design Rule Manual from foundry and PDK documents.
  • Able to fully document project related issues and lessons learned during the project.
  • Demonstrable competence in ‘Design for Manufacture’ techniques
  • Proficiency in providing accurate estimation of layout timescales and timescale risks
  • Competence and expertise in providing layouts to deadline as defined by project plans
  • Command of verbal and written English to the standard required to work on international project teams




Degree level qualification in Electronics engineering or a related discipline typically required


Key Relationships:


Internal interaction with the CMS design teams, process department and data transfer.

External interaction with contract layout resources.