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Title:  Experienced DFT/STA Engineer

Company:  Renesas Design Vietnam Co., Ltd.
Country:  VN
State: 
City:  Ho Chi Minh
Department: 
Business Unit:  0
Office: 
Job Function:  Hardware (Digital)
Job Type: 
Description: 

Job Description:

1. DFT (Design for testability)
- DFT (Memory/Logic BIST, SCAN, Boundary Scan) insertion, verification and test pattern generation for IP, CPU and Chip design
2. STA (Static Timing Analysis)
- Timing analysis, timing closure.
- Creating timing constraint.

Job Requirements:

- Bachelor or Master Degree in Information Technology/Computer Engineering/Computer Science/Telecoms/Electronics
- Solid understanding about DFT technique: Memory BIST, Logic BIST, SCAN, Boundary Scan, or STA technique: Timing analysis, Timing optimization.
- Solid knowledge in using EDA tool (ex: Mentor, Synopsys, Cadence  DFT/Simulation tools or STA tool)
- Good written and oral communication & interpersonal skills
- Have good team working skill and good relationship with the others

- Long-term working commitment

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