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タイトル:  FED design/verification

会社名:  Renesas Semiconductor Design (Beijing) Co., Ltd.
国/地域:  CN
部署:  MCU Development Department 1
場所: 

CN

職務機能:  Hardware Engineering

Responsibility

logic design and verification for MCU chip

 

Qualification:

1) Familiar with VerilogHDL language. IC design related work experience (RTL design experience and verification experience) is preferred.
2) Be practical and conscientious and have a sense of responsibility.
3) Able to communicate and collaborate well with other team members.