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Title:  Staff Design Verification Engineer

Company:  Renesas Electronics America Inc.
Country/Region:  US
State:  NC
City:  Durham
Business Unit:  IoT and Infrastructure Business Unit
Office:  Durham
Job Function:  Hardware (Digital)
Job Type:  Permanent

This is an opportunity to join a top-notch Design Team with Renesas Electronics America’s leading power management product line. As part of one of Renesas’s most prominent Battery and Optical Design Groups, this Engineer will work on next-generation IC products for multiple fast paced consumer power products. This engineer is responsible for System Architecture, Mixed Signal Verification, and Mixed Signal Design. This role will be initially focused on mixed signal verification, a rapidly evolving field that involves knowledge of System Architecture, Mixed Signal Circuit Design, Coding (SystemVerilog, VerilogAMS) and state of the art mixed signal simulation techniques.


This role is intended to give the successful candidate a holistic introduction to a state of the art mixed signal IC development environment. It will involve close interaction with a wide variety of technical experts in different domains, and require the candidate to be flexible in term of learning new skills and tools. There is significant scope for multi-dimensional technical development within the role.



  • Actively involved in all stages of product development including specification, circuit design, circuit modeling, verification, design for test, and silicon debug
  • Coding of simulation infrastructure using SystemVerilog & VerilogAMS 
  • Set up AMS verification environment, develop, and verify self-tested test benches for Mixed Signal chips and sub-circuits
  • Use and Development of Advanced mixed signal simulation techniques to enhance simulation efficiency
  • Works diligently to accomplish project goals and meet schedule requirements.
  • Drives towards continuous personal, team, project and Company improvement.


  • Master's degree in Electrical Engineering with 6+ years (or BSEE with 8+ years) of relevant industry experience with a strong background in AMS design. Exceptional talent may be credited towards education and experience requirements
  • Experience in digital and mixed-signal Verification
  • VerilogAMS and Verilog/SystemVerilog languages, modeling, and AMS simulators
  • UVM testbench creation, writing and implementation is a plus
  • Proficient developing scripts (Shell, Perl, Python etc.), and Cadence SKILL language is plus.
  • Experience with AMS behavioral top level modeling and verification methodology to speed up simulation (understanding accuracy/speed tradeoff and interfaces)
  • Must be able to work independently with limited supervision and work closely with team. Must be very organized, self-motivated and passionate about the work
  • Language skills: Written and verbal English language proficiency is required
  • Tools: Cadence AMS Design Environment and Tool proficiency is required


This company is an equal opportunity employer and makes employment decisions without regard to race, gender, disability or protected veteran status.


Equal Opportunity Employer: Disability/Veteran

Nearest Major Market: Chico