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Title:  Principal Verification Design Engineer

Requisition ID:  39586
Department: 
Location: 

Duluth, GA, US Ottawa, ON, CA Durham, NC, US

Job Function:  Hardware Engineering

Company Overview:
Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.


Renesas is a global, multi-billion dollar, publicly-traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center, and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics.

 

The role will be working hybrid (a blend of onsite and remote)

 

Job Description:

Renesas is looking for a talented individual for their memory interface products. We are looking for a candidate with a strong background in the verification of complex integrated circuits.  The candidate needs to have skills that are up to date with the latest IC verification tools and flow.  Candidate will work closely with design, applications, and test engineering.   In addition, strong collaboration and communication skills are a must.

 

Desired Skills and Experience:

  • Develop verification testbench components for chip/module level using SystemVerilog, C & Perl
  • Use high level language concepts (Object oriented, UVM etc) to develop extendable environment
  • Define and execute detailed verification plan from spec working with architects, designers, system engineers
  • Incorporate code-coverage, functional coverage, assertions, cover-groups etc to achieve 100% verification completeness prior to tapeout
  • Debug tests, run gate level simulations
  • Develop automated/scripted design flows for the above mentioned development processes
  • Participate in silicon debug and analysis
  • Support generation of production test vectors

 

Qualifications:

  • MS in Computer or Electrical Engineering with a minimum of 5+ years of experience in design/verification management of highly complex projects
  • Organized and creative thinker, motivated, and independent learner who can multitask in a dynamic environment, able to create and implement new solutions where required
  • Must be good in building verification environments preferably using the verification subset of high level languages like System Verilog (OVM, UVM)
  • Must be proficient in Verilog (System Verilog preferred).
  • Proficiency in scripting language like Python, Perl, Tcl/Tk, Shell is a definite plus.
  • Experience with simulators like ncVerilog (Incisive), VCS, and debug tools like DVE, Simvision, Verdi
  • Good understanding of latest formal verification techniques, assertions, OOP etc, and experience with cosims, gate level verilog, RTL synthesis are good to have.
  • Understanding or prior experience with Industry standard protocols like DDR4/DDR5 is a definite plus
  • Good written and oral communication skills. Ability to clearly document plans.
  • Ability to interface with different teams and prioritize work based on project needs.

 

Education:

Masters in Computer or Electrical Engineering

 

Equal Opportunity Employer: Disability/Veteran


Nearest Major Market: Atlanta