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Title:  Senior Engineer - Digital Design/Verification

Requisition ID:  33598
Department:  RF Communications Department

Bangalore, IN

Job Function:  Hardware (Digital)

Position - Senior Engineer


Location: Bangalore, India


Job Description

5+ years of experience in Digital Design (SV) and Verification (SV-UVM)
Project track records
In-depth knowhow of standard serial protocols such as SPI/I2C/I3C
Hands-on experience Verilog RTL design
Hands-on experience in analog components modeling
Hands-on experience in Logic Design, Linting, CDC analysis, Synthesis and Static Timing Analysis
Hands-on experience in Metric Driven Verification methodologies, in particular System Verilog UVM
Hands-on experience in Formal Verification
Silicon bring-up and debug experience
Detail oriented with strong organizational, problem solving, and communication skills (in writing as well as orally)
Strong understanding of Mixed Signal integration procedures and methodologies, Front-End/Back-end design flows