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Title:  Sr Staff Digital Verification Engineer

Department: 
Location: 

Austin, US

Job Function:  Hardware (Digital)

Renesas is a global semiconductor company providing hardware and software solutions for a range of cutting-edge technologies including self-driving cars, robots, automated factory equipment, and smart home applications. We are a key supplier to the world’s leading manufacturers of the electronics you rely on every day; you may not see our products, but they are all around you.

 

Renesas is a global, multi-billion dollar, publicly-traded company headquartered in Japan, and has subsidiaries in 20 countries worldwide. Renesas is a dynamic, multi-cultural technology company where employees learn, mentor, innovate and thrive. Renesas is extending our share in fast-growing data economy-related markets such as infrastructure and data center, and strengthening our presence in the industrial/IOT and automotive segments. Our solutions drive products developed by major innovators around the world. Join us and build your future by being part of what’s next in electronics.

 

REA is seeking a SoC Verification Engineer for our Infrastructure Power team in Austin, TX, where we develop the most advanced digital power IC’s in the industry.  We have high caliber talent covering all disciplines of IC development co-located in our Austin design center.  You will work alongside the full spectrum of contributors to your products, including marketing, applications, logic design, analog design, firmware, verification, validation, software, product, and test engineers.  

 

You will architect, design, and maintain verification systems for integrated circuits that supply power to the largest and most powerful advanced computing platforms. Your contributions will span low level circuits to large system design and you will see those systems all the way through to high volume manufacturing. 

In this role, you will use your design and verification expertise to verify complex power management IC designs collaborating closely with design and verification engineers in active projects and perform hands-on verification. Using your SystemVerilog coding and problem-solving skills, you will build efficient and effective constrained-random verification environments that exercise designs through typical and corner-cases to uncover design errors. You will be responsible for the full life cycle of verification, from verification planning to test execution, to collecting and closing coverage.

 

Responsibilities:
• Plan the verification of complex SoC & design blocks by fully understanding the design specification
• Interact with design/system engineers to identify important verification scenarios
• Create and enhance constrained-random verification environments using SystemVerilog
• Create and support UVM compliant test-bench architecture
• Formally verify designs with SVA and industry leading formal tools
• Identify and write various coverage metrics for stimulus and corner-cases
• Build reusable DV infrastructure components for both block and top-level environments
• Debug tests in collaboration design engineering staff
• Build verification tools for system automation, regressions and reporting

 

Minimum Qualifications:
• BS/MSEE & 8-12 years of relevant work experience
• Experience with Verilog, SystemVerilog, SVA and functional coverage
• Deep understanding of event-driven simulator based modeling techniques
• Advance knowledge of mixed signal concepts and digital-analog interfaces
• Developed and executed several comprehensive SoC and block level verification plans
• Worked on commercially successful IC’s
• Strong problem-solving abilities
• Clear written and verbal communications, including code documentation

 

Preferred Qualifications:
• 4-7 years of relevant experience in the design and/or verification of mixed signal and digital IC’s
• Experience in the verification of power management ICs, high speed interfaces, or peripheral controllers
• Strong knowledge of SystemVerilog, VIP integration, High speed interface protocols
• Experience in AMS modelling and verification
• Prior experience in the development of the pre/post silicon verification strategy, test designs, and test infrastructure
• Proficiency with a scripting language like Python/Perl
• Familiarity with FPGA emulation techniques, lab equipment
• Understanding of firmware (C language) based test routines to run on embedded MCU

 

We recognize and appreciate the value and contributions of individuals with diverse backgrounds and experiences and welcome all qualified individuals to apply.

 

Equal Opportunity Employer: Disability/Veteran

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Nearest Major Market: Austin